Pragmatic FlexIC Platform Gen 3
The next-generation design platform is here, unlocking a world of possibilities in mixed-signal flexible ASIC design
Available and accessible today, Pragmatic’s FlexIC Platform Gen 3 comprises a process design kit (PDK) – compatible with standard electronic design automation (EDA) tools – and standard cell libraries, enabling innovators to swiftly design and manufacture custom FlexICs – our ultra-thin, physically flexible application-specific integrated circuits (ASICs) with a low carbon footprint.
FlexIC Platform Gen 3 enables you to create highly customised, more sustainable designs, leveraging the unique form factor – along with rapid fabrication capabilities and enhanced design efficiency – to bring innovative products to market faster than ever before. Get started with the Platform Gen 3 PDK today.
Video: FlexIC technology
FlexIC Platform Gen 3 enables innovative IC design on our pioneering FlexIC technology.
Watch to find out how FlexICs deliver connect, sense and compute capabilities in an ultra-thin, flexible form factor, bringing intelligence and connectivity where traditional chips can’t go.
FAQs
It’s based on 600nm Indium Gallium Zinc Oxide (IGZO) thin-film transistor (TFT) NMOS process technology.
Our unique and innovative FlexIC fabrication uses orders of magnitude less water, fewer materials and process steps and much lower temperatures than standard silicon manufacturing. Our foundry boasts cycle times of just days, taking designs from tape-out to delivery in just weeks, for agile product development and faster go-to-market times.
- Primitive device library with simulation models
- Parameterized cells (PCells)
- Verification checks (DRC, LVS)
- Technology data and files
- Design, layout, tape out manuals & guides
They have a minimum bend radius of just 5mm.
Yes, both Siemens and Cadence.
Around 37 microns, including wafer-level packaging.
