Pragmatic’s R&D team were celebrating this week, as their paper – Flexing RISC-V Instruction Subset Processors to the Extreme Edge – won the Best Paper Award at MICRO58, one of the world’s most prestigious conferences on microarchitecture.
The paper was chosen for the award from nearly 1,000 initial submissions, 124 accepted papers and six finalists. Lead author and ASIC Design Engineer Ali Raisardali presented the work – which formed part of his PhD at KU Leuven – at the event in Seoul, Korea.
Custom RISC-V processors
The paper explores a new way to automatically generate tiny, low-cost FlexICs based on a 32-bit RISC-V instruction subset. Utilising open-source RISC-V architecture, it breaks down instructions into small ‘building blocks’ which are stitched together to create a custom processor. As each building block is already pre-tested and verified, this approach dramatically reduces design and testing time, making it quicker and cheaper to create processors tailored to specific tasks.
The chips use about 30% less power and space compared to normal RISC-V processors and are up to 30 times more energy efficient than the smallest existing 32-bit RISC-V chip. This makes them ideal for applications where cost, comfort, and sustainability are as important as performance, e.g. disposable medical dressings, smart clothing, or eco-friendly consumer goods.
The award highlights the cutting-edge research our team is driving in flexible computing – pushing innovation to the furthest edges of what’s possible. Congratulations to all involved!
